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Installation and Operation
2.4
MCP6XXX AMPLIFIER EVALUATION BOARD 4 OPERATION
Items discussed in this section include:
? Building the Amplifier
? Testing the Amplifier
? Amplifier Modification: Using 8-Pin SOIC Op Amps
2.4.1
Building the Amplifier
This inverting integrator is described as follows:
?
?
?
?
?
?
Power Supply V DD is 5.0V
Load Capacitance C L is 56 pF
Load Resistance R L is 1.6 k Ω
R 1 = 8.06 k Ω , R 2 is open, R 3 = 8.06 k Ω , C 1 = 1 μ F, R ISO = 0 Ω
Input Reference V REF = 0.5V DD
Integrator Control Strategy: Feedback Loop (JP1: Position 1, JP2: Position 1, JP3:
Position 1, JP4: Position 1)
? The fully assembled inverting integrator is shown in Figure 2-6.
Power Supply
8k
V D D
VDD
RV1
10k
RV2
Block
JP1
1
2
VREF
C3
0.1 μF
R3
VDD
0.1 μF
CU1
U1
Non-Inverting
Comparator
Block
RISO
RV3
2k
JP2
1
R1
C1
VL
G N D
VINX
2
3
VIN
R2
R4 100
CL
RL
VSW
M1
GND
JP3
1
2
R5
100
JP4
1
2
G N D
* Test Point
FIGURE 2-6:
Inverting Integrator Example Supported by the MCP6XXX
Amplifier Evaluation Board 4.
? 2007 Microchip Technology Inc.
DS51681A-page 11
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